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The LAN89730 is a high performance solution for USB to 10/100 Ethernet port bridging. With automotive applications ranging from diagnostics， fast software download， gateway services， in-vehicle engineering development， manufacturing test and legislated inspection interfaces， the device is targeted as a high-performance， low-cost USB/Ethernet connectivity solution. The LAN89730 contains an integrated 10/100 Ethernet PHY， HSIC interface， Hi-Speed USB 2.0 device controller， 10/ 100 Ethernet MAC， TAP controller， EEPROM controller， and a FIFO controller with a total of 30 kB of internal packet buffering. Two kB of buffer memory are allocated to the Transaction Layer Interface （TLI）， while 28 kB are allocated to the FIFO Controller （FCT）。 The internal USB 2.0 device controller is compliant with the USB 2.0 Hi-Speed standard. The HSIC interface is compliant with the High-Speed Interchip USB Electrical Specification Revision 1.0. High-Speed Inter-Chip （HSIC） is a digital interconnect bus that enables the use of USB technology as a low-power chip-to-chip interconnect at speeds up to 480 Mb/ s. The device implements Control， Interrupt， Bulk-In and Bulk-Out USB Endpoints. The Ethernet controller supports auto-negotiation， auto-polarity correction， HP Auto-MDIX， and is compliant with the IEEE 802.3 and 802.3u standards. An external MII interface provides support for an external Fast Ethernet PHY functionality. Multiple power management features are provided， including various low-power modes， and Magic Packet， Wake On LAN and Link Status Change wake events. These wake events can be programmed to initiate a USB remote wakeup. A PCI-like PME wake is also supported when the host controller is disabled. An internal EEPROM controller exists to load various USB configuration information and the device MAC address. The integrated IEEE 1149.1 compliant TAP controller provides boundary scan via JTAG.
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